Memory Interface Chip
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DDR5 RCD05
Product Description
ONE Semiconductor's KD5RCD05 is designed for 1.1V VDD and up to 8000Mbps operation, and fully compatible with JEDEC standard DDR5 RCD05. It supports speeds up to 8000 MT/s. It contains two separate channels which have some common logic such as clocking, but otherwise operate independently of each other. Each channel has a 7-bit double data rate CA bus input, a single parity input, two chip select inputs, and produces two copies of 14-bit single data rate CA bus outputs, and two copies of the chip select outputs. The RCD has a common clock input and PLL, but produces separate clock outputs to the DRAM channels.
feature
- ● Applications : RDIMM
- ● Compliant with the latest JEDEC DDR5RCD05 specification
- ● Speed up to 8000MT/s
- ● 1.1V operation
- ● Two channel 1:2 registering buffer for address and control signals
- ● Integrated PLL clock driver
- ● Parity checking across CA and DPAR separately on two sub-channels
- ● Output characteristics configurable through control registers
- ● CA, CS and DFE training mode
- ● I2C and I3C Basic modes interface support
- ● Power saving modes with or without clock stop.
- ● Package : 264-ball FCBGA, 0.60mm/0.675mm ball pitch, 14 x 21 grid